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Special issue: Technologies for future high-efficiency industrial silicon wafer solar cells

Frontiers in Energy 2017, Volume 11, Issue 1, Pages 1-3 doi: 10.1007/s11708-016-0436-4

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Patterned wafer bonding using ultraviolet adhesive

Rui ZHUO, Guanglan LIAO, Wenliang LIU, Lei NIE, Tielin SHI

Frontiers of Mechanical Engineering 2011, Volume 6, Issue 2, Pages 214-218 doi: 10.1007/s11465-011-0130-5

Abstract:

The process of patterned wafer bonding using ultraviolet (UV) adhesive as the intermediate layer wasExperimental results indicate that patterned wafer bonding using UV adhesive is achieved under room temperaturePatterned wafer bonding using UV adhesive will have great potential in the fabrication of microfluidic

Keywords： ultraviolet (UV) adhesive intermediate layer patterned wafer bonding

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High-quality industrial n-type silicon wafers with an efficiency of over 23% for Si heterojunction solar cells

Fanying MENG,Jinning LIU,Leilei SHEN,Jianhua SHI,Anjun HAN,Liping ZHANG,Yucheng LIU,Jian YU,Junkai ZHANG,Rui ZHOU,Zhengxin LIU

Frontiers in Energy 2017, Volume 11, Issue 1, Pages 78-84 doi: 10.1007/s11708-016-0435-5

Abstract: sunlight into electrical power, the pyramid size, pyramid density and roughness of surface of the Cz-Si waferthe simulation revealed that the highest efficiency of the SHJ solar cell could be achieved by the waferFortunately, over 23% of the conversion efficiency of the SHJ solar cell with a wafer thickness of 100Evidently, the large availability of both n-type ingot and thinner wafer strongly supported the lower

Keywords： n-type Cz-Si thinner wafer surface texture high efficiency SHJ solar cell

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Effects of taping on grinding quality of silicon wafers in backgrinding

Zhigang DONG, Qian ZHANG, Haijun LIU, Renke KANG, Shang GAO

Frontiers of Mechanical Engineering 2021, Volume 16, Issue 3, Pages 559-569 doi: 10.1007/s11465-020-0624-0

Abstract: Taping is often used to protect patterned wafers and reduce fragmentation during backgrinding of silicon wafers. Grinding experiments using coarse and fine resin-bond diamond grinding wheels were performed on silicon wafers with tapes of different thicknesses to investigate the effects of taping on peak-to-valley (PV), surface roughness, and subsurface damage of silicon wafers after grinding. Results showed that taping in backgrinding could provide effective protection for ground wafers from breakage. However, the PV value, surface roughness, and subsurface damage of silicon wafers with taping deteriorated compared with those without taping although the deterioration extents were very limited. The PV value of silicon wafers with taping decreased with increasing mesh size of the grinding wheel and the final thickness. The surface roughness and subsurface damage of silicon wafers with taping decreased with increasing mesh size of grinding wheel but was not affected by removal thickness. We hope the experimental finding could help fully understand the role of taping in backgrinding.

Keywords： taping silicon wafer backgrinding subsurface damage surface roughness

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MEMS-based thermoelectric infrared sensors: A review

Dehui XU, Yuelin WANG, Bin XIONG, Tie LI

Frontiers of Mechanical Engineering 2017, Volume 12, Issue 4, Pages 557-566 doi: 10.1007/s11465-017-0441-2

Abstract:

In the past decade, micro-electromechanical systems (MEMS)-based thermoelectric infrared (IR) sensors have received considerable attention because of the advances in micromachining technology. This paper presents a review of MEMS-based thermoelectric IR sensors. The first part describes the physics of the device and discusses the figures of merit. The second part discusses the sensing materials, thermal isolation microstructures, absorber designs, and packaging methods for these sensors and provides examples. Moreover, the status of sensor implementation technology is examined from a historical perspective by presenting findings from the early years to the most recent findings.

Keywords： thermoelectric infrared sensor CMOS-MEMS thermopile micromachining wafer-level package

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Fabrication of Si-based three-dimensional microbatteries: A review

Chuang YUE, Jing LI, Liwei LIN

Frontiers of Mechanical Engineering 2017, Volume 12, Issue 4, Pages 459-476 doi: 10.1007/s11465-017-0462-x

Abstract:

High-performance, Si-based three-dimensional (3D) microbattery systems for powering micro/nano-electromechanical systems and lab-on-chip smart electronic devices have attracted increasing research attention. These systems are characterized by compatible fabrication and integratibility resulting from the silicon-based technologies used in their production. The use of support substrates, electrodes or current collectors, electrolytes, and even batteries used in 3D layouts has become increasingly important in fabricating microbatteries with high energy, high power density, and wide-ranging applications. In this review, Si-based 3D microbatteries and related fabrication technologies, especially the production of micro-lithium ion batteries, are reviewed and discussed in detail in order to provide guidance for the design and fabrication.

Keywords： three-dimensional (3D) wafer-scale Si-based anode micro-LIBs thin-film deposition

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Eddy current measurement of the thickness of top Cu film of the multilayer interconnects in the integrated circuit (IC) manufacturing process

Zilian QU,Yonggang MENG,Qian ZHAO

Frontiers of Mechanical Engineering 2015, Volume 10, Issue 1, Pages 1-6 doi: 10.1007/s11465-015-0325-2

Abstract:

This paper proposes a new eddy current method, named equivalent unit method (EUM), for the thickness measurement of the top copper film of multilayer interconnects in the chemical mechanical polishing (CMP) process, which is an important step in the integrated circuit (IC) manufacturing. The influence of the underneath circuit layers on the eddy current is modeled and treated as an equivalent film thickness. By subtracting this equivalent film component, the accuracy of the thickness measurement of the top copper layer with an eddy current sensor is improved and the absolute error is 3 nm for sampler measurement.

Keywords： CMP eddy current multilayer wafer Cu interconnects equivalent unit

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Progress and Prospect of Semiconductor Silicon Wafers in China

Zhang Guohu, Xiao Qinghua, Ma Fei

Strategic Study of CAE 2023, Volume 25, Issue 1, Pages 68-78 doi: 10.15302/J-SSCAE-2023.01.002

Abstract: inch and 12-inch silicon wafers, analyzes the development status of the global semiconductor silicon waferThe study specifically focuses on the development status of China's semiconductor silicon wafer industryhoping to provide a reference for the higher-quality development of China’s semiconductor silicon wafer

Keywords： semiconductor silicon wafer 8 inches 12 inches industry synergy advanced processing